DRV8323RSRGZR

DRV8323RSRGZR

Part Number: DRV8323RSRGZR

Manufacturer: Texas Instruments

Description: IC MTR DRV MULTIPHAS 6-60V 48QFN

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DRV8323RSRGZR Description

The DRV832x family of components is a type of integrated gate driver used in three-phase systems. These components include three half-bridge gate drivers, each of which may power N-channel power MOSFETs on a circuit’s high and low sides. High-side MOSFETs in the DRV832x are driven by an inbuilt charge pump, while a linear regulator drives low-side MOSFETs. At its source, the Smart Gate Drive architecture can handle peak gate drive currents of up to 2 A. The DRV832x only requires a single power source to function and accepts input voltages between 6 and 60 V (for the gate driver) and 4 and 60 V (for the buck regulator, if used). Because of the PWM modes (6x, 3x, 1x, and independent input), connecting with controller circuits is straightforward.

The SPI or hardware (H/W) interface allows various configuration parameters for the gate driver and device. Using three low-side current sense amplifiers, the DRV8323 and DRV8323R can sense current in both directions across the driving stage’s three phases. Both the DRV8320R and the DRV8323R feature a built-in 600-mA buck regulator. A low-power sleep mode is offered for low quiescent current consumption, during which most internal circuitry is disabled. There are built-in safeguards against damage caused by Undervoltage, charge pump faults, MOSFET overcurrent, MOSFET short circuits, faulty gate drivers, and excessive temperatures. The nFAULT pin provides information about any errors that have occurred.

DRV8323RSRGZR Features

  • Gate driver power supplies integrated.
  • 100% PWM Duty Cycle is supported.
  • Pump for High-Side Charge.
  • Regulator with a low side.
  • Buck regulator with integrated option.
  • The LMR16006X SIMPLE SWITCHER®.
  • Operating voltage range from 4 to 60 volts.
  • The output capability of 0.8 to 60-V, 600 mA.
  • Optional Integrated Triple Current Sense Amplifiers (CSAs)
  • Adjustable Gain (5, 10, 20, 40 V/V)
  • Bidirectional or Unidirectional Support
  • SPI and Hardware Interface Available
  • 6x, 3x, 1x, and Independent PWM Modes
  • Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
  • Low-Power Sleep Mode (12 µA)
  • Linear Voltage Regulator, 3.3 V, 30 mA
  • Compact QFN Packages and Footprints
  • Efficient System Design With Power Blocks

Detailed Description

The DRV832x series of devices is an integrated 6-to-60-V gate driver for three-phase motor drive applications. These devices integrate three independent half-bridge gate drivers, a charge pump, and a linear regulator for the supply voltages of the high-side and low-side gate drivers. As a result, the number of system components and the cost and complexity associated with the system are reduced. Additionally, an optional triple current shunt amplifier (also known as a current sense amplifier) and an optional 600-mA buck regulator are incorporated into the device.

Using an external controller, a standard serial peripheral interface, abbreviated as SPI, makes it possible to configure the various settings of a device straightforwardly and retrieve fault diagnostic information. A hardware interface (H/W) option is another choice that gives users the ability to configure the most frequent settings by using external resistors that are fixed in place. The gate drivers can accommodate external N-channel power MOSFETs on both the high and the low sides and can drive peak currents of up to 1 A from the source and 2 A from the sink while maintaining an average output current of 25 mA.

Doubler Charge Pump

A doubler charge pump is responsible for generating the supply voltage that the high-side gate drive requires. This charge pump setup regulates the output voltage to be 11 V above VVM. A linear regulator from the VM power supply set to provide an output voltage of 11 volts generates the supply voltage for the low-side gate driver. A Smart Gate Drive architecture allows the gate driver to control the VDS switching speed of the power MOSFET by dynamically adjusting the strength of the gate drive’s output current. This is possible because the gate driver can adjust the strength of the gate drive output current.

Because of this feature, the user can do away with the external gate drive resistors and diodes, which results in a decrease in the total number of components on the bill of materials as well as in the cost and size of the printed circuit board (PCB). An internal state machine is utilized in the design of this architecture to protect against short-circuit events in the gate driver, manage the half-bridges dead time, and protect against dV/dt parasitic turn-on in the external power MOSFET. The DRV8323 and DRV8323R devices each contain three current sense amplifiers that are bidirectional. These amplifiers monitor the current level flowing through each of the external half-bridges by using a low-side shunt resistor.

Gain Setting

The gain of the current sensing amplifier can be changed through either the SPI or hardware interface. The SPI technique allows for greater leeway in modifying the output bias point. An external controller or other logic circuits can be powered by the 600-mA buck regulator built into the DRV8320R and DRV8323R devices. Internally, the buck regulator is constructed on a separate die to draw power from the gate driver or another source. The DRV832x series of devices offers a wide variety of built-in protection features and a high degree of device integration.

These include overtemperature shutdown, short-circuit detection in the gate drivers, and overcurrent monitoring in the voltage regulators and power supplies (OTW and OTSD). The nFAULT pin signals the occurrence of a fault, and the SPI registers for the current device version provide more information. Devices of the DRV832x family are offered in QFN surface-mount packages with a 0.5-mm pin pitch. Size-wise, a 32-pin box is 5 mm by 5 mm, a 40-pin package is 6 mm by 6 mm, and a 48-pin package is 7 mm by 7 mm.

Conclusion

The DRV832x device family is suitable for use with an input voltage source (VM) between 6 V and 60 V. A VM-rated ceramic capacitor of 0.1 F needs to be located as close to the device as possible. The bulk bypass capacitance for the external power MOSFETs and the bulk capacitor required for the VM pin can be combined. Bypassing the external half-bridge MOSFETs calls for additional bulk capacitance, which should be sized according to the application’s needs.

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