Part Number: FT4232HL-REEL

Manufacturer: Future Technology Devices International Ltd


Shipped from: Shenzhen/HK Warehouse

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Technical Specifications of FT4232HL-REEL

Datasheet  FT4232HL-REEL datasheet
Category Integrated Circuits (ICs)
Family Interface – Controllers
Manufacturer FTDI, Future Technology Devices International Ltd
Series USBmadeEZ-FIFO
Packaging Tape & Reel (TR)
Part Status Active
Protocol USB
Function Bridge, USB to UART
Interface UART
Standards USB 2.0
Voltage – Supply 3 V ~ 3.6 V
Current – Supply 70mA
Operating Temperature -40°C ~ 85°C
Package / Case 64-LQFP
Supplier Device Package 64-LQFP (10×10)

FT4232HL-REEL Description

The FT4232H is the latest generation of USB devices from FTDI. The FT4232H is a USB 2.0 high-speed (480Mb/s) UART/MPSSE IC.

The device offers up to four UARTs. Two of them can have MPSSE engines individually configured. The FT4232H now has two UART/Bit-bang ports and 2 MPSSE engines, allowing it to emulate various synchronous serial protocols.

FT4232HL-REEL Features

  • Multiple options for the chip’s four serial ports.
  • The entire USB protocol is taken care of by the chip. There is no need to write any custom firmware to work with USB.
  • USB 2.0 Full Speed and High Speed (480Mbits/s) are supported.
  • On channels A and B, you’ll find a pair of Multi-Protocol Synchronous Serial Engines (MPSSE) that streamline the development of synchronous serial protocols (such as USB to JTAG, I2C, SPI, or bit-bang).
  • Individual baud rate generators.
  • UART data transfer rates up to 12Mbaud on RS232, RS422, and RS485. An external level shifter limits the RS-232 data rate.
  • Most of the time, custom USB driver creation is not necessary. Thanks to FTDI’s accessible Virtual Com Port (VCP) and Direct (D2XX) drivers.
  • Optional traffic TX/RX signs can be added with LEDs and an external 74HC595 shift register.
  • Customizable timeout for receiving buffer.
  • Integrated PLL clock multiplier, POR function, and +1.8V LDO regulator for VCORE are just a few of the characteristics of this highly integrated design (12MHz – 480MHz).
  • Handshaking can be performed in software using X-On/X-Off, or it can be performed in hardware with full assistance.
  • The UART Interface offers odd/even/mark/space/no parity, 7/8 bit data, and 1/2 stop bits.
  • The use of the TXDEN pin enables automatic transmission in serial RS485 applications.
  • The operational configuration mode and USB Description strings are programmable in external EEPROM over the USB interface.
  • I/O drive strength (4, 8, 12, or 16 mA) and slew rate are programmable.
  • Supports self-powered, high-power self-powered, and bus-powered USB setups.
  • Compliant host controller for UHCI, OHCI, and EHCI.
  • Bulk data transmission using USB (512-byte packets in High-Speed mode).
  • Applications for USB to JTAG, USB to SPI, and USB to I2C are supported by dedicated Windows DLLs.
  • The I/O interface is at +3.3V while the chip core is at +1.8V (+5V Tolerant).
  • Extended industrial operating temperature range of -40°C to 85°C.
  • 64-LD Lead-Free LQFP or QFN package that is small.
  • Available in small 56 Pin VQFN packets free of Pb (RoHS compliant) operating voltage span for a single source of +3.3V.

USB Compliant

The FT4232H has completed USB-IF Test-ID (TID) 40720024, proving that it complies with the USB 2.0 specification. The exact timing of the rise and fall times of the USB signals is dependent on the system as a whole because of the PCB layout, external components, and transient protection on the USB signals. A minor adjustment may be needed for USB compliance. This timing can be altered using a programmable parameter in the same external EEPROM as the USB descriptors. Timing may be changed when passive components are added to USB signals.

Function Description

The FT4232H represents FTDI’s fifth-generation USB device. The FT4232H is an integrated circuit (IC) that converts USB 2.0 high speed (480Mb/s) to UART/MPSSE. Multiple standard serial interfaces can be configured for use. The FT4232H has four programmable interfaces that can each be controlled individually. Using an MPSSE and two independent baud rate generators, you may build up a pair of these interfaces to function in UART, JTAG, SPI, I2C, or bit-bang mode. The remaining two interfaces can be configured as either a bit-bang or a UART.

Functional Integration.

Key Features

fast quad interface USB. Four distinct flexible/configurable serial interfaces are offered by the FT4232H using USB 2.0 High Speed (480Mbits/s).

The FT4232H has a USB protocol engine that controls the USB 2.0 High-Speed interface (UTMI) and the Universal Transceiver Macrocell Interface (UTMI).

The FT4232H is a phase-locked loop (PLL) that operates from 12 MHz to 480 MHz and includes an integrated +1.8V Low Drop-Out (LDO) regulator. Each of the channel’s Tx and Rx data buffers is 2 kilobytes. On a single chip, the FT4232H successfully incorporates the entire USB protocol.

Latency Timer

This functions as a timeout to flush small data packets back to the PC and is a driver feature. While 0ms to 256ms can be changed, the default value is 16ms. Every high-speed micro-frame has a packet transport at 0ms delay.

Bit-Bang Interface Mode in Synchronous and Asynchronous Mode Desc

Channels A, B, C, or D of the FT4232H can be set up as bit-bang interfaces. Bitbang modes come in two flavors: synchronous and asynchronous.

Asynchronous Bit-Bang Mode

Both the traditional BM Bit-Bang mode and the asynchronous variant are functionally equivalent. Any channel set to asynchronous bit-bang mode will clock data sent generally to the device onto the parallel I/O data pins (those which have been configured as outputs). Every single input/output pin can be set up differently. The baud rate generator sets the data transmission rate. In addition to the baud rate clock ticking, new data must be written for the information to evolve. The pins will retain the last written value if the channel is not further updated.

Synchronous Bit-Bang Mode

When using synchronous Bit-Bang mode, only the parallel I/O port pins are modified when data is sent from the USB interface to the parallel interface. Then, data is sent to the pins from the USB Rx FIFO buffer. Once the parallel interface has been written to, the USB Tx FIFO can only accept data from the parallel pins. If the USB TXFIFO of the FT4232H is filled, the parallel interface won’t transfer any data. The mode is called “Synchronized Bit-Bang.” Before being transported over the USB RxFIFO in synchronous bit-bang mode, data is first read from the parallel I/O pins on the data bus. Because it delays the output by one byte, you will need to give an extra byte if you want to decode the data in the most recent byte.


There are three distinct FT4232H packaging options. Optional LQFP-64, QFN-64, and VQFN-56 packages are available for the FT4232, with the FT4232HL, FT4232HQ, and FT4232H-56Q, respectively.

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