MP4569GN-Z

MP4569GN-Z

Part Number: MP4569GN-Z

Manufacturer: Monolithic Power Systems Inc

Description: IC REG BUCK ADJ 300MA 8SOIC

Shipped from: Shenzhen/HK Warehouse

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MP4569GN-Z Description

The MP4569 is a high-side/low-side, integrated high-voltage power MOSFET step-down switching regulator. Up to 0.3 A of highly effective output is offered. Numerous step-down applications can be accommodated in the automotive environment thanks to the wide 4.5V to 75V input range. For battery-powered applications, a 3.5 A shutdown mode quiescent current is suitable. Lowering the switching frequency under the light-load condition to lower the switching and gate driver losses enables high power conversion efficiency over a wide load range. The switching frequency during startup and short circuit can also be reduced to avoid inductor current runaway. Thermal shutdown enables fault-tolerant, dependable operation. The MP4569 is offered in SOIC-8 EP and QFN-10 (3mmx3mm) packages.

MP4569GN-Z Features

  • A quiescent current of 20 A (Active mode)
  • Wide Operating Input Range of 4.5V to 75V
  • Internal Power MOSFETs, 1.2/0.45
  • Programmable 1% at room temperature and 2% at maximum temperature is the soft-start FB tolerance.
  • Variable Output
  • QFN Package Reference Voltage Output of 1V
  • Mode of Low Shutdown Present: 3.5 A
  • available in SOIC-8 EP Packages and QFN-10 (3mmx3mm) sizes.

MP4569GN-Z Operation

High-side and low-side high-voltage power MOSFETs (HS FET and LS FET, respectively) are integrated into the MP4569, a 75V, 0.3A, synchronous, step-down switching regulator. A highly effective 0.3A output is provided.

Wide input voltage range, external soft-start control, and precise current limit are some of its features. It is suitable for battery-powered applications thanks to its shallow operational quiescent current.

Control Plan

The FB comparator, ILIM comparator, and zero current detectors (ZCD) block are used to control the PWM. When the inductor current falls to zero and VFB falls below the 1V reference, the HS FET turns on, and the ILIM comparator begins to detect the HS FET current. The LS FET and ZCD block turn on when the HS FET current reaches the limit, which also causes the HS FET to shut off. To lower the quiescent current, the ILIM comparator is disabled in the interim. When the inductor current reaches zero, the LS FET and ZCD block turn off. The HS FET immediately turns on and starts a new cycle if VFB is less than the 1V reference. HS FET won’t activate until VFB falls below the 1V reference if it is still higher than that level.

BIAS and the internal regulator

The 2.6V internal regulator powers the majority of the internal circuitry. This regulator accepts VIN and functions across the entire VIN range. The regulator’s output is fully regulated when VIN is greater than 3.0V. Lower output voltages are the result of lower VIN values. The bias supply overrides the input voltage and powers the internal regulator when VBIAS>2.9V. Additionally, it can power the LS FET driver when VBIAS>4.5V. The effectiveness of internal power regulators can be increased by using BIAS. It is advised to connect BIAS to the output voltage between 2.9 and 5.5 volts. An external supply >2.9V or, better yet, >4.5V can power BIAS when the output voltage exceeds the range mentioned above.

Turn on control

A dedicated enable-control pin, EN, on the MP4569 is used to enable and disable the chip when VIN is high. The logic here is HIGH.

Its constant trailing threshold is 1.2V. About 350 mV, more voltage is required for it to rise. For the chip to be disabled when floating, the EN pin is internally pulled down to GND. The chip enters the lowest shutdown-current mode when EN is equal to 0V. The chip stays shutdown mode with a slightly higher shutdown current when EN is more significant than zero but less than its rising threshold.

Lockout due to Under-Voltage

The chip is guarded against operating below the operational supply voltage range by VIN under voltage lockout (UVLO). About 4.2V is the UVLO-rising threshold, and about 3.75V is the UVLO-trailing threshold.

Soft-start

The converter output voltage is prevented from overshooting during startup by reference-type soft-start. The internal circuitry of the chip produces a steady current to charge the external SS capacitor as soon as it turns on. The soft-start time determines how slowly the soft-start voltage (SS) ramps from 0V. The FB comparator uses VSS rather than VREF as the reference when VSS is less than the VREF because VSS supersedes VREF in that situation. When VSS exceeds VREF, VREF reclaims control.

Additionally, connected to VFB is VSS. Even though VSS can be much smaller than VFB, it can only just outperform VFB. If VFB is ever lost, VSS keeps track of it. By ramping up as though it were a brand-new soft-start process when the short circuit is removed, this function prevents output voltage overshoot during short-circuit recovery.

Thermal Reduction

The chip’s thermal shutdown stops it from overheating. When the silicon fails, the temperature rises above its upper threshold, and the thermal shutdown feature turns the entire chip off. The chip resumes operation when the temperature drops below its lower point.

Bootstrap Charging and the Floating Driver

The external bootstrap capacitor powers the floating HS FET driver. With a rising threshold of approximately 2.4V and hysteresis of approximately 300mV, this floating driver has UVLO protection. The SS voltage resets to zero during this UVLO. The regulator uses the soft-start procedure when the UVLO is turned off. The internal bootstrap regulator charges and controls the capacitor to a voltage of approximately 5V. A PMOS pass transistor connected from VIN to BST turns on to charge the bootstrap capacitor when the voltage difference between BST and SW drops below its operating thresholds. The route is from VIN to BST, then to SW.

To accommodate charging, the external circuit needs to have enough voltage headroom. The bootstrap capacitor can charge as long as VIN is sufficiently higher than SW. Because VIN is roughly equal to SW when the HS FET is ON, the bootstrap capacitor cannot charge. When the LS FET is turned on, when VIN – VSW is at its greatest, charging is at its best. The difference between VIN and VOUT can charge the bootstrap capacitor because VSW equals VOUT when there is no current flowing through the inductor. Additional external circuitry can guarantee the bootstrap voltage in the designated operation region if the internal circuit does not have enough voltage or time to charge the bootstrap capacitor.

Conclusion

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