Part Number: TPS65910A3A1RSLR

Manufacturer: Texas Instruments

Description: Power Management Specialised – PMIC Int Pwr Mgmt IC

Shipped from: Shenzhen/HK Warehouse

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Technical Specifications of TPS65910A3A1RSLR

Datasheet  TPS65910A3A1RSLR datasheet
Category Integrated Circuits (ICs)
Family PMIC – Power Management – Specialized
Manufacturer Texas Instruments
Packaging Tape & Reel (TR)
Part Status Active
Applications Handheld/Mobile Devices, OMAP?
Current – Supply
Voltage – Supply 1.7 V ~ 5.5 V
Operating Temperature -40°C ~ 85°C
Mounting Type Surface Mount
Package / Case 48-VFQFN Exposed Pad
Supplier Device Package 48-VQFN (6×6)

TPS65910A3A1RSLR Description

The TPS65910 device is a 48-QFN integrated circuit (IC) for power management. It is designed specifically for applications that use a single Li-Ion or Li-Ion polymer battery cell, three Ni-MH cells in series, or a 5-volt (V) input. Supporting the unique power needs of OMAP-based applications, the device has three step-down converters, one step-up converter, and eight LDOs. Two step-down converters supply power to two processing cores and are managed by a dedicated class-3 SmartReflex interface to achieve the greatest possible efficiency. The input/output and memory circuits receive power from the third converter.

The device has eight universal LDOs, each with a different voltage and current output. The LDOs can be managed entirely over the I 2C bus. These LDOs have a wide range of applications and are designed to be utilized in the ways that best suit the user. The OMAP-based CPUs have two dedicated LDOs that power the PLL and video DAC supply rails, four general-purpose auxiliary LDOs that can power other devices in the system, and two dedicated LDOs that can power the DDR memory supplies if necessary. To accommodate the power sequencing needs of OMAP devices, the device incorporates a real-time clock (RTC) and an integrated power controller (EPC).

TPS65910A3A1RSLR Features

  • Power controller embedded.
  • There are two effective DC-DC step-down converters for the processor cores.
  • One 5-V DC-DC converter is an efficient step-up.
  • Dynamic Voltage Management for Process Cores Compliant with Smart ReflexTM.
  • One LDO with a Real-Time Clock (RTC) and eight LDO voltage regulators (Internal Purpose).
  • One General-Purpose High-Speed I2C Interface.
  • One High-Speed I2C Interface for Class 3 Control and Command of SmartReflex (SR-I2C).
  • Two Enable Signals Multiplexed Using SR-I2C Can Be Set to Control the Voltage Fed to the Processor Cores and Their Individual Power Supplies.
  • Hot-Die Detection and Thermal Shutdown Protection.

Detailed Description

Authority Citation When an external capacitor is inserted between the VREF output and the REFGND analog ground, the bandgap voltage reference is filtered. Within the device, the VREF voltage is dispersed and buffered.

Power Sources

Inductor-based switching mode power supplies (SMPS) and linear low drop-out voltage regulators are two examples of the power resources that the TPS65910 gadget makes available (LDOs). These supply resources deliver the necessary amount of power to modules incorporated in the TPS65910 device and to the external CPU cores and components located outside the device. Two of these SMPS units are DVS-capable and are compatible with the SmartReflex Class 3 standard. The host processor benefits from each SMPS’s independent core voltage zones. The host processor I/Os receives its supply voltage from the SMPS that is still active.

Control Signals


This signal’s falling edge (or rising edge, depending on the polarity that was set) triggers a transition from the ACTIVE state of the device to the SLEEP state when none of the requirements that disable sleep on the device are satisfied. Depending on the polarity that was programmed into the device, a transition back to the ACTIVE state is triggered by a rising edge by default, but a falling edge can also trigger it.

This input signal is sensitive to the level, and no debouncing is performed. Whenever the device enters the SLEEP state, any predefined resources will have their power consumption reduced or turned off automatically. Programming the SLEEP KEEP LDO ON and the SLEEP KEEP RES ON registers will allow the resources to be kept in their active mode (full-load capacity). These registers have one bit dedicated to each power resource. While the bit is set to 1, the resource in question maintains its active status even when the device is in the SLEEP state. Additionally, the 32KCLKOUT register is a part of the SLEEP KEEP RES ON register. If the corresponding mask bit is set, the 32-kHz clock output will always remain in the SLEEP state.


This signal’s rising edge is responsible for transitioning from an OFF state to an ACTIVE state when none of the devices’ power-on disabled requirements are met. Its falling edge is responsible for the device transitioning back to an OFF state. This signal is typically used to control the device when configured in slave mode. Either the SYSEN output signal from other TPS659xx devices or the NRESPWRON signal from another TPS65910 device can be attached to it to use it. The level of this input signal is being carefully monitored, but no debouncing is being performed.

Backup Registers

When the power is turned off to the external host, the device’s application firmware can access the five 8-bit registers included as part of the RTC. These registers can be utilized to store data. As long as the VRTC is operational, the contents of these registers will remain unchanged.


Interface A general-purpose serial control interface, also known as CTL-I2C, enables read and write access to the configuration registers of all of the system’s resources. Smart Reflex programs such as DVFS and AVS each have their unique serial control interface (SR-I2C), which is a second serial control interface altogether. Both control interfaces adhere to the HS-I2C specification and are fully functional. These interfaces support the basic slave mode at 100 kilobits per second (Kbps), the Fast mode at 400 kilobits per second, and the high-speed mode (3.4 Mbps). The I 2C module can be used for various purposes and has only one slave with a hard-coded address (ID1 = 2Dh). One slave address is hard-coded into the SmartReflex I 2C module, 12h (ID0). Unfortunately, support is not provided for the master mode.


This power management IC from Texas Instruments, model TPS65910A3A1RSLR, has a false pin count, which makes it possible to have simple control over the power supply. This integrated circuit for power management accepts input voltages ranging from 2.7 V to 5.5 V. During shipment, this component will be wrapped in tape and reel packaging to guarantee that it will arrive undamaged and make it possible to attach it as quickly as possible when it has been delivered. This integrated circuit for power control can function in temperatures ranging from -40 degrees Celsius to 85 degrees Celsius.

If you need to order TPS65910A3A1RSLR or any other electrical component, you’ve come to the right place. Give us a call at ICRFQ, your leading electronic components distributor within China, and we will ensure you receive the best goods at a reasonable price.

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