ADS1015IDGSR IC

Technical Specifications of ADS1015IDGSR

Datasheet	ADS1015IDGSR datasheet
Category	Integrated Circuits (ICs)
Family	Data Acquisition – Analog to Digital Converters (ADC)
Manufacturer	Texas Instruments
Series	–
Packaging	Cut Tape (CT)
Part Status	Active
Number of Bits	12
Sampling Rate (Per Second)	3.3k
Number of Inputs	2, 4
Input Type	Differential, Single Ended
Data Interface	I2C
Configuration	MUX-PGA-ADC
Ratio – S/H:ADC	–
Number of A/D Converters	1
Architecture	Sigma-Delta
Reference Type	Internal
Voltage – Supply, Analog	2 V ~ 5.5 V
Voltage – Supply, Digital	2 V ~ 5.5 V
Features	PGA, Selectable Address
Operating Temperature	-40°C ~ 125°C
Package / Case	10-TFSOP, 10-MSOP (0.118″, 3.00mm Width)
Supplier Device Package	10-VSSOP

ADS1015IDGSR Description

Precision, low-power, 12-bit, I 2C-compatible, analog-to-digital converters (ADCs) are available in ultra-small, leadless X2QFN-10 and VSSOP-10 packages with the ADS1014, ADS1013, and ADS1015 devices (ADS101x). A low-drift voltage reference and an oscillator are built into the ADS101x devices. A programmable gain amplifier (PGA) and a digital comparator are built into the ADS1014 and ADS1015. The ADS101x’s wide operating supply range and low power consumption make it ideal for sensor measurement applications with limited resources.

Conversion rates of up to 3300 samples per second are supported by the ADS101x (SPS). The PGA’s input ranges are 256 mV to 6.144 V; therefore, it can take accurate readings of very big and small signals. The ADS1015 has a multiplexer (MUX) for either differential or single-ended input measurements. To identify under and over voltage, you can use the digital comparator included in the ADS1014 and ADS1015. The ADS101x can function in either a continuous or one-time conversion mode. While using the single-shot mode, devices are shut down immediately following conversion, resulting in a significant reduction in power usage when they are not in use.

ADS1015IDGSR Features

• The miniature X2QFN dimensions of the package are 2mm x 1.5mm x 0.4mm.
• No-noise resolution at 12 bits.
• Large Power Supply Variability, from 2.0 V to 5.5 V.
• 150 A is a very small amount of current (Continuous-Conversion Mode).
• The data rate can be set anywhere between 128 SPS and 3.3 kSPS.
• Consequences are resolved in a single cycle.
• Accurate Voltage Reference with Little Internal Drift.
• What’s going on here is an internal oscillator.
• Connection Interface Type I/Type 2C: Four different addresses are available via the pins.
• Optional differential inputs plus four standard inputs (ADS1015).
• Computer-controlled Comparator that Can Be Programmed (ADS1014 and ADS1015).
• Range of Use: -40 to +125 degrees Celsius.

ADS1015IDGSR Applications

• Portable Instrumentation.
• Consumer Electronics.
• Factory Automation and Process Control.

ADS1015IDGSR Detailed Description

The ADS101x are tiny, low-power, noise-free, 12-bit delta-sigma () A/D converters (ADCs). The ADS101x comprises an ADC core, a clock oscillator, and an I 2C interface, all of which have their own internal voltage references. ADS1014 and ADS1015 incorporate a programmable gain amplifier (PGA) and a digital comparator.

The difference between V(AINP) and V is the differential signal VIN measured by the ADS101x ADC core (AINN). First, a differential switched-capacitor modulator and then a digital filter make up the heart of the converter. Any common-mode signals are severely dampened by this design. An internal voltage reference is used to compare incoming signals. The modulator sends a rapid bitstream to the digital filter, generating a code proportional to the input voltage. Single-shot and continuous conversion are both viable options when using the ADS101x.

In single-shot mode, the ADC converts the input signal only once when instructed, saves the result in a conversion register, and then goes into a power-saving mode. This change saves a lot of energy for systems that only need conversions occasionally or when there are large periods of inactivity between conversions. When the ADC is set to continuous-conversion mode, it will start processing the input signal after the last conversion. Continuous conversion occurs at a pace that is identical to the data rate that was initially set. Information can be accessed whenever needed and reflects the most recent conversion round.

ADS1015IDGSR Feature Description

● Analog Inputs

The voltage between AINP and AINN is measured by charging and discharging capacitors in a switched-capacitor input stage, as used by the ADS101x. The input signal is sampled at a rate known as the sampling frequency or the modulator frequency. The ADS101x uses an internal oscillator running at 1 MHz divided by 4 to produce 250 kHz of fMOD. These input stage capacitors are rather small, and their average loading may look resistant to an outside circuit.

● Oscillator

There is a 1 MHz oscillator built right into every ADS101x. An external clock cannot power these gadgets. Both time and temperature cause the internal oscillator to drift. As the oscillator frequency increases, the data rate at which it is output increases correspondingly.

● Conversion Ready Pin (ADS1014 and ADS1015 Only)

Setting the ALERT/RDY pin up as a conversion-ready pin is possible. To make a pin conversion ready, set its most-significant bit in the Hi thresh register to 1 and its most-significant bit in the Lo thresh register to 0. There has been no change in the behavior of the COMP POL bit. If the ALERT/RDY pin is enabled by setting the COMP QUE[1:0] bits to any 2-bit value other than 11, the ALERT/RDY pin will output the conversion-ready signal. Once used to regulate behavior, COMP MODE and COMP LAT are now completely irrelevant. ALERT/RDY still needs a pullup resistor even when set up as a conversion-ready pin.

● SMBus Alert Response

When the comparator is set to latching comparator mode (COMP LAT = 1), the ALERT/RDY pin will assert if it detects a conversion that exceeds either the higher or lower threshold value. This assertion can be reset only by reading the conversion data or by successfully responding to an SMBus warning and reading the address of the asserting device. Once the conversion data has been cleared, the pin will re-establish itself if it goes beyond either the lower or upper threshold values. This claim will impact no ongoing conversions. There is an open-drain output on the ALERT/RDY pin. Multiple devices can share the interface bus in this design. The pin remains in its active high state when disabled to prevent it from conflicting with other devices using the same bus line.

An SMBus alert command (00011001) is sent to the I 2C bus by the master when it detects that the ALERT/RDY pin has latched. Slave addresses are returned in response to commands sent to ADS1015 and ADS1014 data converters on the I 2C bus that have their ALERT/RDY pins held high. In the event that several ADS101x on the I 2C bus assert the latched ALERT/RDY pin, the clearing of assertion is arbitrated during the address response phase of the SMBus alert.

In a dispute, the device with the lowest I 2C address will always be declared the victor. The comparator output pin assertion is not cleared if the device loses arbitration. When an SMBus warning is received, the master will respond in kind until all devices have released their assertions. In window comparator mode, if signals go over the high threshold, the SMBus alert status bit will read 1, and if signals go below the low threshold, it will read 0.

Device Functional Modes

● Reset and Power-Up

The ADS101x performs a full reset and initializes the Config register to its factory settings whenever powered on. After the ADS101x reset procedure is complete, the device goes into a power-off mode. Nothing is being converted to or from any format, yet the device interface and digital blocks are still operational. When first installed, the ADS101x is in a power-down mode, which prevents systems with limited power from experiencing an unexpected spike when turning on. ADS101x can be reset with an I 2C general-call reset instruction. A general-call reset instruction (06h) causes the ADS101x to conduct an internal reset like a power cycle would.

● Operating Modes

The ADS101x can function in either a continuous-conversion mode or a single-shot mode. The appropriate mode of operation is chosen by setting the MODE bit in the Config register.

● Single-Shot Mode

When the MODE bit in the Config register is set to 1, the ADS101x goes into a low-power, single-shot mode. It immediately enters this power-down mode whenever power is first applied to the ADS101x. The devices can still be controlled even when turned off. Until the OS bit in the ADS101x’s Config register is set to 1, the device will stay in its power-saving mode. When the OS bit is set, the device starts up in around 25 s, does a single conversion, and then resets the OS bit to 0. The gadget powers down once more when the converted data are ready to be retrieved. While a conversion is in progress, setting the OS bit to 1 has no effect. Continuous-conversion mode is activated by setting the MODE bit in the Config register to 0.

Conclusion

In conclusion, the ADS1015IDGSR is a remarkable analog-to-digital converter that combines precision, low power consumption, and a wide operating supply range in a compact X2QFN-10 or VSSOP-10 package. Its programmable gain amplifier, digital comparator, and multiplexer allow for differential or single-ended input measurements, making it versatile for sensor measurement applications. The conversion rates of up to 3300 samples per second make it an excellent choice for big and small signals. The ADS1015IDGSR is suitable for various applications, such as consumer electronics, portable instrumentation, factory automation, and process control.

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