CP2102N-A02-GQFN28R Controllers

These integrated USB-to-UART bridge controllers provide an easy way to port RS-232 designs to USB while using the least number of components and PCB space. A USB 2.0 controller, oscillator, USB transceiver, and Universal Asynchronous Receiver/Transmitter (UART) are all included in the compact CP2102N-A02-GQFN28R. Development doesn’t call for any other external USB parts. Using a basic GUI-based configurator, users can choose from all customization and configuration choices. The CP2102N devices provide rapid USB connectivity with little development effort by removing complicated firmware and driver development requirements.

The following features are present in the CP2102N-A02-GQFN28R devices:

Single-Chip USB-to-UART Data Transfer

• No need for extra resistors thanks to the integrated USB transceiver.
• No need for an external crystal due to the integrated clock.
• For vendor ID, serial number, power descriptor, release number, and product description strings, an internal 960-byte programmable ROM is used.
• Power-on reset circuit on the chip.
• Voltage regulator on-chip with a 3.3 V output.
• Pin compatibility with the QFN28 package (CP2101/2/9).
• CP2104-compatible pins (QFN24 package).

USB Function Controller

• Full-speed; conforms to USB Specification 2.0 (12 Mbps).
• SUSPEND pins support USB suspend states.
• Finding a USB battery charger (USB BCS 1.2 Specification).
• A suspended host can be awoken remotely.
• Single 3.0 to 3.6 V or 3.0 to 5.25 V power supply.

Virtual COM Port Device Drivers

• Works with current COM port programs.
• Supports Linux, Mac, and Windows.
• License for free distribution.

Functional Description

4.1 USB Function Controller and Transceiver

The CP2102N’s USB 2.0 compatible full-speed Universal Serial Bus function controller has an on-chip matching, pull-up resistor, and integrated transceiver. The USB host controller issues command requests to the USB function controller, which in turn issues commands to govern the operation of the UART. The USB function controller controls all data transfers between the USB and the UART.

The USB Suspend and Resume signals are supported by the CP2102N chip and additional circuits for power management.  Suspend signaling on the bus will cause the CP2102N to go into suspend mode. The CP2102N-A02-GQFN28R asserts the SUSPEND and SUSPENDb signals when the device is in Suspend mode. After a CP2102N reset, SUSPEND and SUSPENDb are maintained until the USB Enumeration device configuration is finished.

Sending Break Signaling

When placed between TXD and ground, a 10k Ohm external resistor allows the CP2102N to handle break signaling. Across all baud speeds, this resistor is sufficient for break signaling. The CP2102N will wait six times for inflight data to finish transmission after receiving a Send Break command, which stops it from adding new data to the transmitter FIFO.

Other USB transactions, like RX data receiving or GPIO commands, won’t be performed while it waits; instead, they will be processed as soon as the break is started. When this happens, the RS-485 signal will start asserting if enabled. RTS will start asserting if RTS TX Control is enabled. When the 6-byte timer expires, the external resistor pulls down TXD to generate a break, and the CP2102N ignores flow control status by setting the TXD line to a high impedance state.

The TXT LED toggle is turned on while you’re sending a break. Normal USB operations, including RX data receipt and GPIO commands, take place. The CP2102N-A02-GQFN28R removes TXD from the high impedance state when it receives a Stop Break command. To allow for stabilization, it is stored for 1 byte of time. The RS485 and RTS signals wait for the designated hold time to expire before the transmitter begins regular operations (if RTS TX Control is enabled).

Additional Features

General Inputs and Outputs (GPIO) Up to 7 GPIO on the CP2102N can be managed by the host. These pins are open-drain by default and during reset, with a weak pull-up turned on and the port latch set to 1. The pins can be made push-pull to drive external circuitry, such as LEDs. Additionally, these pins’ states can be changed throughout the regular operation, during the suspension, and after reset.

When a device resets, all pins briefly float high. If this behavior is not desired, it can be ensured that the pin stays low during reset by applying a powerful pull-down (10 k).

Dynamic Suspend B

All pins’ latch values stay static by default during USB Suspend. As an alternative, when the CP2102N device switches from the specified USB state to the suspended USB state, the dynamic suspend functionality places the pin latch in a predetermined condition. The pin latch is reset to the previous value before entering the suspension state as soon as the device leaves the USB to suspend state. The GPIO pins and the UART/Modem Control pins have configuration options for dynamic suspension.

Hardware Handshaking (RTS and CTS)

To use the RTS and CTS pins of the CP2102N, the device must be configured to use hardware flow control on the USB host. The “Ready to Send” (RTS) output of the CP2102N notifies an external UART device that it is ready to send new data and that the UART RX FIFO has not yet reached the FLOW OFF watermark threshold of 448 bytes. When the RX FIFO’s capacity hits the watermark, the CP2102N raises RTS to instruct the external UART device to stop sending data.

The CP2102N waits until the UART RX FIFO reaches the FLOW ON watermark level of 384 bytes before pulling RTS low once more (at least 128 free bytes). The hysteresis enables optimal performance. These RTS watermark levels can be customized through Simplicity Studio’s Xpress Configurator. Recall that the CP2102N can assert RTS in a specific mode called RTS TX Control signaling when transmitting.

Below 300 baud, this mode is inaccessible. At all baud rates, RTS hardware flow control is functional. The CP2102N’s CTS input, also known as “Clear to Send,” is an active-low input that the external UART device uses to let the CP2102N know when its RX FIFO is getting full. Once CTS is pulled high, the CP2102N won’t send anything more significant than two bytes of data.

Conclusion

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