Part Number: DP83867IRRGZR

Manufacturer: Texas Instruments


Shipped from: Shenzhen/HK Warehouse

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DP83867IRRGZR Description

The DP83867 is an efficient Physical Layer transceiver that supports 10BASE-Te, 100BASE-TX, and 1000BASE-T Ethernet standards with built-in PMD sublayers. The DP83867 is an ESD protector more powerful than the required 8 kV by the International Electrotechnical Commission (IEC) (direct contact). The DP83867 is intended to make setting up a 10/100/1000 Mbps Ethernet LAN as simple as possible. Using a separate transformer, it immediately connects to twisted pair media.

All three of the IEEE 802.3 variants—the Standard Media Independent Interface, the Gigabit Media Independent Interface (GMII), and the Reduced GMII—provide a direct connection between this device and the MAC layer (RGMII). Only RGMII is supported by the QFN package, whereas the QFP package supports the other two MII variants. The DP83867 can synchronize clocks precisely and even has a synchronous Ethernet clock output. It supports IEEE 1588 Start of Frame Detection and has low latency. During full load, the DP83867 only uses 490mW (PAP) or 457mW (RGZ) of power. You can significantly reduce your computer’s power consumption by activating Wake on LAN.

DP83867IRRGZR Features

  • very little RGMII latency TX is 90 ns, and RX is 290 ns.
  • Compliant with the Time Sensitive Network (TSN).
  • 457 mW of low power usage.
  • More than 8000 V IEC 61000-4-2 ESD defense.
  • meets the class B emission requirements of EN55011.
  • On RX and TX, there are 16 customizable RGMII delay modes.
  • MDI termination resistors are built right in.
  • the output of a synchronized clock at 25 or 125 MHz.
  • Frame Detection for the IEEE 1588-time stamp begins.
  • Mirror mode for RJ45.
  • diagnostics of cables.
  • I/O programmable voltage (3.3 V, 2.5 V, 1.8 V).
  • Quick link-dropping mode.

DP83867IRRGZR Detailed Description

The DP83867 is a high-performance Physical Layer transceiver supporting the 100BASE-TX, 10BASE-Te, and 1000BASE-T Ethernet protocols thanks to its built-in PMD sub-layers. The DP83867 facilitates the setup of 10/100/1000 Mbps Ethernet LANs with minimal effort. An optional external transformer allows for direct connection to twisted pair media. This gadget uses the IEEE 802.3u Standard Media Independent Interface, the IEEE 802.3z Gigabit Media Independent Interface (GMII), or the Reduced Gigabit Media Independent Interface (RMII) to connect to the MAC layer (RGMII).

The DP83867 can synchronize your clock to the nanosecond and even has a synchronous Ethernet clock output. With its low jitter and low latency and its support for time-sensitive protocols like IEEE 1588 Start of Frame Detection, this standard is a great choice. The DP83867 has cutting-edge diagnostic capabilities, such as dynamic link quality monitoring for fault prediction under normal conditions of use. It has a maximum cable length of 130 meters.

DP83867IRRGZR Feature Description

● Wake-on-LAN Packet Detection

With Wake-on-LAN, a particular kind of Ethernet packet known as a Magic Packet can be used to awaken the DP83867 from its low-power state. If a packet meets certain criteria, the DP83867 can be set to trigger an interrupt to wake up the MAC. It is also possible to configure the system so that a GPIO will generate a signal in response to a certain input.

● SFD Latency Variation and Determinism

The RX CTRL and TX CTRL signals of RGMII are not precise enough for latency-sensitive protocols to time stamp the transmission and reception of packets. System designers can use SFD pulses to increase the precision of packet time stamping. While SFD pulses are less likely to exhibit latency fluctuation than RGMII signals inherently do, this is nonetheless the case due to the 1000BASE-established T’s architecture. Assuming an Ethernet connection where all 4 pairs have the same propagation time, a connected link partner’s TX SFD pulse and RX SFD pulse are timed to determine the baseline latency. If all four pairs are well-matched, the 1000BASE-T PHY can skip aligning the symbols it receives across the wire, preventing any delay from doing so.

● Clock Output

The DP83867 has multiple clocks, including a local reference clock, a transmit clock for Ethernet and a receive clock for Ethernet. The local reference clock receives input from an external crystal or oscillator. All of the device’s timing is derived from the local reference clock. During transmission, the local reference clock is included in network packets; this clock is then retrieved at the receiving node. The receive clock is synchronized to the transmit clock in the partner by decoding the data stream of received Ethernet packets. The CLK OUT pin on the DP83867 can be set to send out these internal clocks by modifying the I/O Configuration register (at address 0x0170). The output clock is automatically phase-locked to the XI oscillator/crystal input.

It is possible to synchronize the output clock with the received data at either 125 MHz or the 25 MHz rate obtained by dividing the former by 5. This is accomplished by means of registers. Moreover, the line driver transmits clock can be clocked out. In 1000Base-T mode, the output clock can be set for any of the four signal paths (transmit or receive).

Device Functional Modes

● MAC Interfaces

The DP83867 may link up with an Ethernet MAC over RGMII, GMII, or MII interfaces. The normal operating mode of the MAC interface is set by the RGMII Disable strap (RX D6). The RGMIICTL register’s bit 7 represents the RGMII Enable strap (address 0x0032). The DP83867 switches to GMII mode when RGMII mode is turned off.

● Reduced GMII (RGMII)

The goal of the Reduced Gigabit Media Independent Interface (RGMII) was to lessen the number of pins needed to connect the media access controller (MAC) and physical layer (PHY) (12 pins for RGMII relative to 24 pins for GMII). All control signals and data lines are combined and multiplexed to achieve this. They use both the leading and trailing clock hands. A GTX CLK and RX CLK clock of 125 MHz is used for Gigabit operation, whereas clocks of 2.5 and 25 MHz are used for 10 and 100 Mbps.

● Parallel Detection

The DP83867 complies with the IEEE 802.3 standard, which means it can perform the Parallel Detection function. Receivers operating at 10/100 Mbps must constantly monitor the incoming signal and update the Auto-Negotiation function on the link’s health if Parallel Detection is to be used. If the Link Partner doesn’t support Auto-Negotiation but sends link signals that the 10BASE-Te or 100BASE-X PMA recognizes as valid, Auto-Negotiation will use this information to configure the appropriate technology.

When the DP83867 finishes Auto-Negotiation due to Parallel Detection without performing a Next Page operation, the mode of operation in the Link Partner is indicated by setting bits 5 and 7 of ANLPAR (register address 0x0005). After successful parallel detection, bits 4 through 0 of the ANLPAR are set to 00001 to signify a valid 802.3 selector field. Once Auto-Negotiation Complete, bit 5 of BMSR (register address 0x0001), is set, the software may detect the negotiation as complete by reading 0 in bit 0 of ANER (register address 0x006). Bit 4 of ANER (register address 0x06) indicates a parallel detect fault if the PHY is set to parallel detect mode and a condition other than a good link occurs.


The reliable and feature-rich DP83867 Physical Layer transceiver supports the 10BASE-Te, 100BASE-TX, and 1000BASE-T Ethernet protocols. It is energy-efficient since it is higher than 8 kV. IEC 61000-4-2 uses less power and is adjusted for ESD protection. The system provides precise clock synchronization, low latency, and IEEE 1588 Start of Frame Detection for time-sensitive protocols. Innovative diagnostics on the DP83867 include wake-on-LAN and dynamic link quality monitoring.

Flexible implementation is made possible by the device’s programmable RGMII delay modes, integrated MDI termination resistors, and customizable termination impedance for MII, GMII, and RGMII. The DP83867 Physical Layer transceiver for 10/100/1000 Mbps Ethernet LANs is reliable and adaptable. To make ordering simple, ICRFQ takes pleasure in offering premium components and top-notch customer support. We constantly strive to go above and beyond for our clients with our dependability and expertise. Whether you require a single part or a large purchase, we will help you find it and guarantee your satisfaction. Click here to try ICRFQ.

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