KSZ8851SNL-TR IC

Technical Specifications of KSZ8851SNL-TR

Datasheet	KSZ8851SNL-TR datasheet
Category	Integrated Circuits (ICs)
Family	Interface – Controllers
Manufacturer	Microchip Technology
Series	–
Packaging	Tape & Reel (TR)
Part Status	Active
Protocol	Ethernet
Function	Controller
Interface	SPI
Standards	10/100 Base-T/TX PHY
Voltage – Supply	1.8V, 2.5V, 3.3V
Current – Supply	–
Operating Temperature	0°C ~ 70°C
Package / Case	32-VFQFN Exposed Pad, 32-MLF?
Supplier Device Package	32-MLF? (5×5)

KSZ8851SNL General Description

The KSZ8851SNL integrates a 10/100 PHY, MAC, and SPI all onto a single chip, making it a suitable choice as a Fast Ethernet controller (SPI). The KSZ8851SNL may connect to an Ethernet network from any SPI-enabled host microcontroller. The KSZ8851SNL is the most affordable way to integrate a high-throughput Ethernet link into legacy SPI-based embedded systems. The KSZ8851SNL is a single-chip, analog/digital device that provides Wake-on-LAN technology, making it ideal for use with Fast Ethernet.

It is made up of a Fast Ethernet MAC controller, SPI, and a one-of-a-kind dynamic memory pointer with a 4-byte buffer border and a total of 18 KB of available space in the host buffer interface, split evenly between the transmit (which receives 6 KB) and receive (which sends 12 KB) directions. The KSZ8851SNL was developed to adhere strictly to all relevant IEEE 802.3 specifications. The KSZ8851SNLI is a variant designed to withstand high temperatures in industrial settings. Analog circuitry improves the design by allowing for more efficient physical signal transmission and reception at the expense of increased power consumption. The KSZ8851SNL supports VDD I/O voltages of 1.8V, 2.5V, or 3.3V from a single 3.3V supply. Management Information Base (MIB) counters and a fast SPI interface with a clock speed of up to 40 MHz are just some of the many features of this versatile device.

The KSZ8851SNL has a special cable testing function built in, and it’s called LinkMD®. This function checks for open and short conditions in cables as well as the length of the cabling plant. The included software displays useful information like cable length and condition. The KSZ8851SNL also works with Hewlett Packard (HP) Auto-MDIX, which removes the necessity of distinguishing between straight and crossover cables.

KSZ8851SNL Features

• The KSZ8851SNL is a good choice for a Fast Ethernet controller because it has a 10/100 PHY, MAC, and SPI all on one chip (SPI).
• Any host microcontroller that can use SPI can connect the KSZ8851SNL to an Ethernet network. The KSZ8851SNL is the least expensive way to add a high-throughput Ethernet link to an embedded system based on SPI.
• The KSZ8851SNL is a single-chip analog/digital device with Wake-on-LAN technology, which makes it perfect for use with Fast Ethernet.
• The KSZ8851SNL was made to follow all relevant IEEE 802.3 specifications to the letter. The KSZ8851SNLI is a version made to work in industrial settings where temperatures are high. Analog circuitry improves the design by letting physical signals be sent and received more efficiently, but it also uses more power.
• From a single 3.3V supply, the KSZ8851SNL can use VDD I/O voltages of 1.8V, 2.5V, or 3.3V. This device has many different features, such as Management Information Base (MIB) counters and a fast SPI interface with a clock speed of up to 40 MHz.
• LinkMD® is a function built into the KSZ8851SNL that lets you test cables. This function checks to see if any cables are open or short, and it also checks to see how long the cabling plant is. The software that comes with it shows useful information, like the length and condition of the cable. The KSZ8851SNL also works with HP Auto-MDIX, which makes it unnecessary to tell the difference between straight and crossover cables.

Functional Description

The KSZ8851SNL is a single-chip Fast Ethernet MAC/PHY controller comprising a 10/100 physical layer transceiver, a MAC, and an industry-standard Serial Peripheral Interface. The host CPU uses the SPI interface to read and write bytes (8 bits), words (16 bits), or double words (32 bits) in the KSZ8851SNL’s internal registers and to access the RXQ/TXQ FIFOs for packet receive/transmit. The KSZ8851SNL meets all IEEE802.3u requirements.

● Normal Operation Mode

Following chip power-up or hardware reset, bit[1:0]=00 in the PMECR register defaults to this value (pin 2). All PLL clocks are operating, PHY and MAC are turned on, and the host interface is prepared for the CPU to read from or write to when the KSZ8851SNL is operating normally. The host CPU can change power management modes by setting bit[1:0] in the PMECR register.

● Energy Detect Mode

If the KSZ8851SNL is not linked to an active link partner, the energy detect mode uses less power than the standard operation mode. The KSZ8851SNL may automatically enter energy detect mode and enter low power if a cable is absent or attached to a powered-down partner. The KSZ8851SNL may quickly power up to a normal power state in energy detect mode when activity picks up due to plugging in a cable or an attempt to establish a link from the far end. The statuses for the energy detect mode are normal power and low power. The KSZ8851SNL switches down all electronics in low power mode with the exception of the receiver’s energy-detecting circuitry.

The PMECR register’s bit[1:0]=01 setting enables the energy to detect mode. The KSZ8851SNL monitors cable energy. If the cable loses power for a longer period of time than the value set at bit[7:0] When the GSWUTR register reads “Go-Sleep time,” the KSZ8851SNL switches to a low power mode. Even in low power mode, the KSZ8851SNL will monitor cable energy. As soon as the cable’s energy is identified and constantly shown for a period longer than the pre-configured value at bit[15:8], If both the auto-wakeup enable bit[7] and wakeup to normal operating mode bit[6] are set in PMECR register, the KSZ8851SNL will enter either the normal power state or the normal operation mode at the wake-up time in GSWUTR register.

If the relevant enable bit[2] is set in the IER (0x90) register or the associated enable bit[8] is set in the PMECR (0xD4) register, the KSZ8851SNL will also assert the PME output pin or issue an interrupt to signify energy detect the event. The power management unit will turn on the host CPU and issue a wakeup command—any register read or write access—to wake up the KSZ8851SNL from the low power state to the normal power state if the auto-wakeup enable bit[7] is disabled. While powered, the cable can send and receive packets from the KSZ8851SNL.

● Power Saving Mode

When the auto-negotiation mode is turned on, the cable is disconnected, bit[1:0]=11 in the PMECR register and bit[10:1] in the P1SCLMD register is set to 1, and the power saving mode is entered. When KSZ8851SNL is in this mode, all PLL clocks are on, MAC is on, all internal register values won’t change, and the host interface is being prepared for CPU reading or writing. This mode mostly turns on or off the PHY transceiver based on the line’s status to save power.

The PHY keeps sending and only turns off the receiver block that isn’t being used. Once activity starts again, either because a cable is plugged in or the other end tries to set up a link, the KSZ8851SNL can automatically switch the PHY power from power-saving mode to a normal power state.

Conclusion

In conclusion, a flexible and highly integrated device, the KSZ8851SNL-TR Ethernet controller, offers an affordable method of integrating Ethernet connectivity in various applications. The KSZ8851SNL-TR is a great option for designers wishing to include Ethernet connectivity into their designs due to its support for various communication protocols and interfaces, low power consumption, and integrated hardware offload engine.

If you’re interested in purchasing the KSZ8851SNL-TR or any other component, please contact ICRFQ, China’s leading distributor of electronic components. To effectively finish your project, our crew is committed to giving you the best products at a fair price.

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