USB3320C-EZK-TR IC

Technical Specifications of USB3320C-EZK-TR

Datasheet	USB3320C-EZK-TR datasheet
Category	Integrated Circuits (ICs)
Family	Interface – Drivers, Receivers, Transceivers
Manufacturer	Microchip Technology
Series	flexPWR?
Packaging	Tape & Reel (TR)
Part Status	Active
Type	Transceiver
Protocol	USB 2.0
Number of Drivers/Receivers	1/1
Duplex	Half
Receiver Hysteresis	50mV
Data Rate	–
Voltage – Supply	1.8 V ~ 3.3 V
Operating Temperature	-40°C ~ 85°C
Mounting Type	Surface Mount
Package / Case	32-VFQFN Exposed Pad
Supplier Device Package	32-QFN (5×5)

USB3320C-EZK-TR General Description

A programmable physical layer (PHY) solution is offered by the Microchip USB3320, a high-speed USB 2.0 transceiver that is a perfect fit for a wide range of applications. The user can choose the reference clock’s frequency. The inbuilt oscillator of the USB3320 can be utilized with either a quartz crystal or a ceramic resonator. An external clock oscillator can also be used to drive the crystal input. A 60MHz external clock in ULPI Input Clock mode is an additional choice. By lowering the number of electrical bill of material (eBOM) parts and the size of the printed circuit board (PCB), a number of innovative features have made the USB3320 the transceiver of choice.

In common situations, outstanding ESD robustness renders external ESD protection devices unnecessary. The integrated Over-Voltage Protection circuit (OVP) guards against voltages as high as 30V for the USB3320. The USB3320 eliminates the expense of a specialized crystal reference from the design using a reference clock from the Link. The integrated USB switch also allows connecting a single USB port to enable special product features. The USB3320 satisfies all electrical specifications needed to function as a Hi-Speed USB Host, Device, or On-the-Go (OTG) transmitter. The USB3320 offers USB Audio and UART modes, enabling USB signalling.

The USB Transceiver is connected to the Link by USB3320 using the UTMI+ Low Pin Interface (ULPI), a recognized industry standard. By utilizing an in-band signalling system and status byte transfers between the Link and transceiver, ULPI enables a USB session to be enabled with only 12 pins. The USB3320 implements the ULPI interface using Microchip’s “wrapper-less” technology. This “wrapper-less” technology allows the transceiver to transmit and receive data with low latency. By including a UTMI to ULPI bridge, Microchip’s low latency transceiver enables the reuse of an existing UTMI Link. The current and tested UTMI Link IP can be reused by adding a bridge to the ASIC.

The USB3320 has a built-in 3.3V Low Drop Out (LDO) regulator that can be utilized optionally to produce 3.3V from power supplied at the VBAT pin. The VBAT pin’s voltage might be anything between 3.1 and 5.5V. When the voltage on VBAT drops to 3.1V, the transceiver can still send USB signals because the regulator’s dropout voltage is less than 100mV. Lower voltages won’t stop the USB transceiver from working, but some parameters might not be within USB requirements.

USB3320C-EZK-TR Architecture Overview

● USB On-The-Go (OTG)

The USB3320 fully supports the USB OTG protocol. In accordance with the type of cable plugged into the outlet, OTG enables the USB3320 to be dynamically configured as a host or device. The USB device transforms into the A-device when the Micro-A plug of a cable is put into the Micro-AB receptacle. The gadget transforms into the B-device when a Micro-B plug is added. While the OTG B-device acts more like a peripheral, the OTG A-device acts more like a host. The “On-The-Go Supplement to the USB 2.0 Specification” addresses the differences. The OTG Module is not used in scenarios where only Host or Device is needed.

● USB Charger Detection Support

The USB3320 has built-in pull-up resistors, or RCD, on both DP and DM to facilitate the detection and identification of various USB charger types. These pull-up resistors can be used to identify the type of USB charger attached, together with single-ended receivers. In Microchip Application Note AN 19.7 – Battery Charging Using Microchip USB Transceivers, implementation guidance for charger detection is provided.

ULPI Operation

The USB3320 facilitates communication between the USB Transceiver (PHY) and Link (device controller) using the industry-standard ULPI digital interface. The separate USB Transceiver can be connected to an ASIC or digital controller with fewer pins thanks to the ULPI interface. For instance, a ULPI interface only needs 12 signals, whereas a whole UTMI+ Level 3 OTG interface needs 54 signals. The “UTMI+ Low Pin Interface (ULPI) Specification Revision 1.1” comprehensively describes the ULPI interface. The operating modes of the USB3320 digital interface are described in the following sections.

● Full Speed or Low-Speed Serial Modes

To support legacy Links that employ either the 3-pin or 6-pin serial format, the USB3320 comes with two serial modes. The Link must write a 1 to either the 3-pin or 6-pin FsLsSerialMode bits in the Interface control register to enter either serial mode. When connected to a device that cannot run at Hi-Speed, Serial Mode may be used to save electricity. The identical process used to enter Low Power Mode is used to enter the serial modes.

The Link writes the Interface Control register bit for the chosen serial mode. At least five clock cycles will pass before the USB3320 asserts DIR and turns the clock off. The data bus then switches to the serial mode’s chosen format. The ULPI transceiver must be in the proper mode before entering the serial mode, which the Link must do.

To save power, the transceiver will turn off the 60MHz clock when in ULPI Output Clock Mode. Before switching into a serial mode, the ClockSuspendM bit of the Interface Control Register should be set if the Link needs to maintain the 60MHz clock during the operation. The 60 MHz clock will be present while using serial modes if it is set. Interrupts from unmasked sources are possible in serial mode.

Before the assertion of DIR, each interrupt source’s state is sampled, contrasted with the asynchronous level from the interrupt source. quitting Low Power Mode is equivalent to quitting the serial modes. The Link must assert STP for the transceiver to receive instructions to quit serial mode. DIR is de-asserted when the transceiver can take command, and the transceiver will then wait for the Link to de-assert STP before resuming synchronous ULPI operation. To restart the USB3320 and put it back in Synchronous Mode, the RESETB pin can also be pulsed low.

Conclusion

In conclusion, the Microchip USB3320 is a superb Hi-Speed USB 2.0 Transceiver that may be adapted to various products. It minimizes the electrical bill of material (eBOM) parts and printed circuit board (PCB) area because of its exceptional ESD durability, inbuilt Over-Voltage Protection circuit, and integrated USB switch. It is a better option for USB Host, Device, or On-the-Go (OTG) transceiver applications due to its low latency transmit and receive times and included 3.3V LDO regulator.

The USB3320 is a top-notch transceiver that offers great functionality and performance thanks to the ULPI interface’s distinctive and specified digital working modes and support for USB Charger Detection. The Microchip USB3320 is highly suggested for creating effective and reasonably priced USB-enabled devices. Get in touch with ICRFQ immediately to discover this product’s advantages!

The Latest And Most Popular Parts That You May Also Like